Abstract
Porous silicon constituting silicon nanostructures layer have been produce
on crystal silicon using different preparation condition in electronical etching
process. The electrical properties of the PS/c-Si heterojunction were studied and
adopted to obtain the electronic structure and construct the energy band diagram of
the device. This device could be used in various applications and was found to be
a staggered type.
on crystal silicon using different preparation condition in electronical etching
process. The electrical properties of the PS/c-Si heterojunction were studied and
adopted to obtain the electronic structure and construct the energy band diagram of
the device. This device could be used in various applications and was found to be
a staggered type.